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why do I see an impact on the cycle time when I update my M580 CPU to SV2.50 ?

Improvements have been done in SV2.50  to enhance the reliability of the access to the internal memory (activation of the ECC : Error Correcting Code activation).

In most cases, very limited impact has been measured on the cycle time of typical applications.
The biggest impact is on some redundant M580 CPU systems (hotstandby) where the cycle time may increase if your application has a very small code to execute but a big set of data to manage (ECC feature only
impacts  hotstandby memory transfer activity, and has very little  impact on user code execution performance).

possible workaround are to :
- reduce the amount of echanged data from primary to standby CPU
- disable the ECC feature using system words %SW150.
   ->To disable ECC: write the value 16#DECC to %SW150 (nd power cycle the CPU (note: this value has to be written again after a cold start using the reset button)
   ->To re-enable ECC after a disable: write any value different of 16#DECC  to %SW150, perform a power cycle or push reset button.

- The status of ECC is given in %S109 : 1 means ECC activated, 0 means ECC desactivated.

Note: %SW150 is transferred from primary to stand-by PLC.

Basics :
- ECC (Error Correcting Code) corrects modern memories random access errors, but can slow down the memory access time.
- ECC feature only impacts  hotstandby memory transfer activity, and has very little  impact on user code execution performance.
- ECC feature only impacts M580 HotStandBy systems.
- memory management optimisations have been deployed to compensate memory access time degradation.
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