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Understanding Invalid Block Tags in PowerLogic SCADA v7.10 r01.2; Preventing #COM for Valid Tags in Devices that Contain Invalid Registers

Goals and Symptoms
Some devices may restrict access to certain memory registers. Such registers may be available for read only, write only or may not be available at all, resulting in a MODBUS exception when the registers are addressed.
Definition: Blocks of registers that cannot be read or written to are referred as invalid memory access blocks.

These devices create a challenge for the PWRMODBUS driver. If the device has invalid blocks that do not support scattered reads (or they are disabled for this device), the driver may try to read registers in blocks that intersect with the registers that cannot be read. This can result in the whole block being invalidated and, in certain cases, may also result in the device being taken offline.
Causes and Fixes
In PowerLogic SCADA v7.10 Service Release 2, a logic code was added to account for these invalid blocks.

NOTE: Any invalid block tags you add must be configured as Long data type. Any other data type selection will result in a "bad raw data type" compile error.

For more information on Invalid Memory Access Blocks, see the attached document taken from the Service Release 3 version of the PowerLogic SCADA System Integrator Manual.

Keywords: PL SCADA, PLSCADA, PLS, PowerSCADA, v7.10 r01, r01.2, Service Release 2, format code, undefined registers
(Removed File URL: 205765_195E/InvalidBlockRegisters.pdf)(Removed Image URL: /PubResEXPORT.nsf/2b87ee90be777fc085257c28006ee4ef/7b851f75e20ca9b8c12578ce0010926e/fl_block_5/0.15C?OpenElement&FieldElemFormat=gif)
Legacy KB System (APS) Data: RESL205765 V1.0, Originally authored by AnVa on 07/15/2011, Last Edited by AnVa on 07/15/2011
Related ranges: PowerLogic SCADA 7.1
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