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Goals and Symptoms
The TSX CFY 11/21 Loss of step check input is connected to the Fault output signal of the translator.
If the translator is not powered up or the cable connection broken, (or) if the Fault output
signal of the translator is ON, the Loss of step signal becomes active.
When this fault is active, the 'Loss of step indicator' in the debug screen is ON and the implicit system variable STEP_FLT (%Ixy.i.28) is set to 1.
Note : The appearance of the Loss of step signal does not cause a fault at TSX CFY11/21 module level. In other words, this is not a fatal fault.
Causes and Fixes
The TSXCFY 11/21 module has an output that should be wired to the translator reset input.
The "Reset loss of step check" command can be activated either by pressing the "Reset step" button in the debug mode screen when online with PL7 (or) via the application program by setting the output ACK_STEPFLT (%Qxy.i.15) to 1.
The activation of this command causes a translator Reset and as long as this command is active, the translator signals that it is not ready and the Translator check fault signal appears and the implicit system variables ST_DRIVE (%Ixy.i.35) , HD_ERR (%Ixy.i.4) in the application program interface are all set to 1.
The Reset loss of step check command can be deactivated either by releasing the "Reset step" button in the debug mode screen (or) via the application program by setting the output ACK_STEPFLT (%Qxy.i.15) to 0.
The fault can be acknowledged either by pressing the Ack button from the debug mode screen (or) via the application program by forcing the output ACK_DEF(%Qxy.i.9) to 1.
Module Pin Out
The 'loss of step check input' is pin 6, 'reset loss of step' outputs are pins 13 and 14 on the 15 pin sub D connector.
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